Fundamentals of logic design / (Record no. 6748)

000 -LEADER
fixed length control field 02451cam a2200421 a 4500
001 - CONTROL NUMBER
control field 13105257
003 - CONTROL NUMBER IDENTIFIER
control field OSt
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20170628200207.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 030226s2004 caua b 001 0 eng
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER
LC control number 2003102726
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780495667766 [paperback]
040 ## - CATALOGING SOURCE
Original cataloging agency DLC
Transcribing agency DLC
Modifying agency DLC
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Edition number 22
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Roth, Charles H.
245 10 - TITLE STATEMENT
Title Fundamentals of logic design /
Statement of responsibility, etc Charles H. Roth, Jr.
250 ## - EDITION STATEMENT
Edition statement Sixth edition.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Belmont, CA :
Name of publisher, distributor, etc Thomson/Brooks/Cole,
Date of publication, distribution, etc c2010.
300 ## - PHYSICAL DESCRIPTION
Extent xix, 756 pages :
Other physical details illustration ;
336 ## - CONTENT TYPE
Source rdacontent
Content type term text
337 ## - MEDIA TYPE
Source rdamedia
Media type term unmediated
338 ## - CARRIER TYPE
Source rdacarrier
Carrier type volume
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc Includes bibliographical references and index.
505 ## - FORMATTED CONTENTS NOTE
Formatted contents note Contents: 1 Number systems and conversion -- 2. Boolean algebra -- 3. Boolean algebra (continued) -- 4. Applications of Boolean algebra minterm and maxterm expansions -- 5. Karnaugh maps -- 6. Quine-McCluskey method -- 7. Multi-level gate circuits NAND and NOR gates -- 8. Combinational circuit design and simulation using gates -- 9. Multiplexers, decoders, and programmable logic devices -- 10. Introduction to VHDL -- 11. Latches and flip-flops -- 12. Registers and counters -- 13. Analysis of clocked sequential circuits -- 14. Derivation of state graphs and tables -- 15. Reduction of state tables state assignment -- 16. Sequential circuit design -- 17. VHDL for sequential logic -- 18. Circuits for arithmetic operations -- 19. State machine design with SM charts -- 20. VHDL for digital system design.
541 ## - IMMEDIATE SOURCE OF ACQUISITION NOTE
Deans/Chairperson
Department
Subject Category Computer Studies : Information System
546 ## - LANGUAGE NOTE
Language note English
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Logic circuits.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Logic design.
856 41 - ELECTRONIC LOCATION AND ACCESS
Materials specified Table of contents
Uniform Resource Identifier http://www.loc.gov/catdir/toc/fy042/2003102726.html
856 42 - ELECTRONIC LOCATION AND ACCESS
Materials specified Contributor biographical information
Uniform Resource Identifier http://www.loc.gov/catdir/enhancements/fy1103/2003102726-b.html
856 42 - ELECTRONIC LOCATION AND ACCESS
Materials specified Publisher description
Uniform Resource Identifier http://www.loc.gov/catdir/enhancements/fy1103/2003102726-d.html
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942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Type of record Book
998 ## - LOCAL CONTROL INFORMATION (RLIN)
Encoded by Sharmine[new]
Date encoded 02/02/2017
998 ## - LOCAL CONTROL INFORMATION (RLIN)
Encoded by Aillen[checked]
Date encoded 06/28/2017
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Library Location Shelving location Date acquired Source of Acquisition Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type Other Library Location
          College Library     Donated by Mr. & Mrs. Ortega   621.395 R74 2010 3UCBL000022430 02/02/2017 02/02/2017 Book UCBL_MAIN

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